.ALIASES
X_U10           U10(1=N713352 5=N713406 7=ERR ) CN @CHAPTER 3_1.Buck VM k factor
+TRAN(sch_1):INS714074@APPLICATION.AMPSIMP.Normal(chips)
R_R2            R2(1=N7138621 2=N713406 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713852@ANALOG.R.Normal(chips)
V_V9            V9(+=N714218 -=0 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713626@SOURCE.VDC.Normal(chips)
V_Vin           Vin(+=N714354 -=0 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713872@SOURCE.VDC.Normal(chips)
L_L1            L1(1=VOUT 2=N713400 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713648@ANALOG.L.Normal(chips)
R_R22           R22(1=N714224 2=0 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713408@ANALOG.R.Normal(chips)
C_C2            C2(1=ERR 2=N713406 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713898@ANALOG.C.Normal(chips)
C_C1            C1(1=ERR 2=N7138621 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713914@ANALOG.C.Normal(chips)
R_R30           R30(1=N714248 2=0 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713674@ANALOG.R.Normal(chips)
R_R25           R25(1=N714218 2=0 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713446@ANALOG.R.Normal(chips)
V_V8            V8(+=N714224 -=0 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713930@SOURCE.VDC.Normal(chips)
R_R5            R5(1=N713394 2=N713400 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713468@ANALOG.R.Normal(chips)
E_GAIN1          GAIN1(OUT=N713386 IN=ERR ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713728@ABM.GAIN.Normal(chips)
C_Cout          Cout(1=0 2=N714380 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713488@ANALOG.C.Normal(chips)
V_V7            V7(+=N714212 -=0 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713974@SOURCE.VDC.Normal(chips)
R_R26           R26(1=N714212 2=0 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713744@ANALOG.R.Normal(chips)
C_C3            C3(1=N713406 2=N714280 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713504@ANALOG.C.Normal(chips)
R_Resr          Resr(1=N714380 2=VOUT ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713994@ANALOG.R.Normal(chips)
V_V10           V10(+=N714248 -=0 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713520@SOURCE.VDC.Normal(chips)
R_R31           R31(1=N714260 2=0 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713764@ANALOG.R.Normal(chips)
R_Rupper          Rupper(1=N713406 2=VOUT ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS714014@ANALOG.R.Normal(chips)
V_Vref          Vref(+=N713352 -=0 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713786@SOURCE.VDC.Normal(chips)
V_V13           V13(+=N736676 -=0 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS736686@SOURCE.VPWL.Normal(chips)
X_U14           U14(A=N714354 C=N713394 P=0 D=N713386 ) CN @CHAPTER 3_1.Buck VM k factor
+TRAN(sch_1):INS714040@PWMSWITCH.PWMVM.Normal(chips)
R_R3            R3(1=N714280 2=VOUT ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713564@ANALOG.R.Normal(chips)
X_U11           U11(NODEMINUS=VOUT NODEPLUS=0 PLUS=N736676 MINUS=0 ) CN @CHAPTER 3_1.Buck VM k factor
+TRAN(sch_1):INS736702@APPLICATION.SWHYSTE.Normal(chips)
V_V11           V11(+=N714260 -=0 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713812@SOURCE.VDC.Normal(chips)
R_Rlower          Rlower(1=0 2=N713406 ) CN @CHAPTER 3_1.Buck VM k factor TRAN(sch_1):INS713586@ANALOG.R.Normal(chips)
_    _(vout=VOUT)
_    _(err=ERR)
.ENDALIASES
